Power and Cost-Optimized FPGAs
Altera FPGA families are architected for cost and power optimization and high integration
Altera FPGA families are architected to provide balanced performance, power efficiency, small form factor, simplicity, and cost for users' FPGA designs. Selected MAX® and Cyclone® families combined with the upcoming Agilex™ 3 FPGA family deliver exceptional value for various applications. If a customer's design does not require the biggest, fastest, or most feature-rich FPGAs available, these are the recommended products to choose from if they still need the advantages of FPGAs: flexibility with performance.
Cost Optimization: These Altera devices are designed to provide the best performance per dollar, ideal for cost-sensitive applications.
Power Efficiency: Altera FPGAs are optimized for low total power consumption, helping to create energy-efficient designs.
High Integration: With integrated features and high I/O density, Altera FPGAs reduce the need for additional components, simplifying the design process and reducing costs. The MAX series even includes data converters and offers a single-chip solution for enhanced integration. The Cyclone and Agilex 3 families offer options including embedded ARM processors and high-speed transceivers, providing more flexibility and computing power within the same FPGA.
Advanced No-Cost Tools: Altera Quartus Prime design software offers a comprehensive design environment with advanced features typically found in expensive tools, all at no cost for these devices.
Choose a Product Family and Development Kit
Agilex 3 FPGAs and SoCs (Learn more about these devices)
- 25 k to 135 k Logic Elements, a performance and feature-rich family
- 345 MHz core speed, AI-infused fabric, advanced security, Dual Arm® A55 core
- 12.5G XCVR, LPDDR4, PCIe® 3.0, 10-GbE
Cyclone V FPGAs and SoCs (Learn more about these devices)
- 25 k to 300 K Logic Elements, a balanced performance, power, and XCVR I/O family
- Dual Arm A9, 6G XCVR, DDR3, PCIe 2.0, AI-capable
MAX 10 FPGAs (Learn more about these devices)
- 2 k to 50 k Logic Elements: On-die dual image configuration and user Flash, a single-chip focused non-volatile family
- ADC, DDR3, single power supply capability, AI-capable
Cyclone 10 LP FPGAs (Learn more about these devices)
- 6 k to 120 k Logic Elements, a cost-optimized packaging and I/O count (up to 535 I/O) family
- Low total power, only two power supplies


