PCI Express® (PCIe) Timing Solutions

Renesas’ PCIe timing solution devices are designed to work together to form full solutions for networking, storage, and data center applications

Image of Renesas’ PCIe Timing SolutionsRenesas’ comprehensive, industry-leading PCIe timing portfolio provides complete solutions for networking, storage, and data center applications. Renesas’ PCIe clock generators, zero-delay and fanout buffers, and fanout multiplexers support PCIe Gen1 to Gen4 data rates and derivatives such as 25G EDR. These devices are designed to work together to form a full solution.

Renesas’ patented LP-HCSL outputs with integrated terminations eliminate up to four resistors per differential output, saving board space and reducing output power up to 90% over standard HCSL outputs. Renesas’ extensive selection of timing devices allows designers to implement the most complex PCIe clock trees while maintaining timing margin, ensuring robust system operation.

Features
  • 9FGV PhiClockTM programmable clock generators
    • Eliminate up to 32 resistors
    • Save up to 55 mm2 of area compared to traditional HCSL outputs
    • As small as 6.25 mm2
    • 85 Ω and 100 Ω system support
    • Spread spectrum clock generation
  • 9Z/9DB zero-delay fanout buffers
    • Eliminate up to 76 resistors
    • Save up to 130 mm2 of area compared to traditional HCSL outputs
    • As small as 16 mm2
    • 85 Ω and 100 Ω system support
    • Spread spectrum clock compatible
Updated: 2018-10-09
Published: 2018-05-04