The Master subsystem is in control of the boot process. At reset, the Master subsystem comes out of reset and the M3 will begin execution. At this point, the rest of the device will remain in reset until released by the M3 boot ROM. This includes the Control subsystem, the Analog subsystem and the bus, which is called the common interface bus or CIB. After some initial device configuration by the M3, the Control subsystem is released from reset. The C28x simply performs some basic set up and then goes into an idle mode to wait for further instructions from the M3, via an inner processor command. This will be covered in more detail in the next slide. The wait in reset mode is entered by the state of EMU0 and EMU1. Wait in reset keeps the M3 from continuing execution until an emulator can be connected. This is important if the code security module is in use. The boot mode is determined by the state of GPIO pins. If the boot is to be a loader then code is downloaded from the peripheral to RAM and then execution is passed to the downloaded code. Booting from serial ports use the same protocol as used by the Stellaris devices. If the boot is to be flash or RAM, then execution is transferred to the entry point of the flash or the RAM.